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 Ordering number : ENA0694A
CMOS IC
LV5113T
Overview
2-Cell Lithium-Ion Secondary Battery Protection IC
The LV5113T is a protection IC for 2-cell lithium-ion secondary batteries.
Features
* Monitoring function for each cell: * High detection voltage accuracy: * Hysteresis cancel function: * Discharge current monitoring function: * Low current consumption: * 0V cell charging function: Detects overcharge and over-discharge conditions and controls the charging and discharging operation of each cell. Over-charge detection accuracy 25mV Over-discharge detection accuracy 100mV The hysteresis of over-discharge detection voltage is canceled by sensing the connection of a load after overcharging has been detected. Detects over-currents, load shorting, and excessively high voltage of a charger and regulates charging and discharging operations. Normal operation mode typ. 6.0A Stand by mode max. 0.2A Charging is enabled even when the cell voltage is 0V by giving a potential difference between the VDD pin and V- pin.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
52307 MS IM / 30707 MS IM 20061220-S00008 No.A0694-1/8
LV5113T
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Power supply voltage Input voltage Charger minus voltage Output voltage Cout pin voltage Dout pin voltage Allowable power dissipation Operating ambient temperature Storage temperature Vcout Vdout Pd max Topr Tstg Independent IC VDD-28 to VDD+0.3 VSS-0.3 to VDD+0.3 170 -30 to +80 -40 to +125 V V mW C C Symbol VDD VConditions Ratings -0.3 to +12 VDD-28 to VDD+0.3 Unit V V
Electrical Characteristics at Ta = 25C, unless especially specified.
Parameter Operation input voltage 0V cell charging minimum operation voltage Over-charge detection voltage Over-charge reset voltage Over-charge detection delay time Over-charge reset delay time Over-discharge detection voltage Over-discharge reset hysteresis voltage Over-discharge detection delay time Over-discharge reset delay time Over-current detection voltage Over-current reset hysteresis voltage Over-current detection delay time Over-current reset delay time Short circuit detection voltage Short circuit detection delay time Over-charger detection voltage Overcharge reset hysteresis voltage Standby reset voltage Excessively high voltage charger detection delay time Excessively high voltage charger reset delay time Reset resistance (connected to VDD) Reset resistance (connected to VSS) Cout Nch ON voltage Cout Pch ON voltage Dout Nch ON voltage Dout Pch ON voltage Vc input current Current drain Standby current RDD RSS VOL1 VOH1 VOL2 VOH2 Ivc IDD Istb IOL=50A, VDD-Vc=4.4V, Vc-VSS=4.4V IOL=50A, VDD-Vc=3.9V, Vc-VSS=3.9V IOL=50A, VDD-Vc=2.2V, Vc-VSS=2.2V IOL=50A, VDD-Vc=3.9V, Vc-VSS=3.9V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=2.2V, Vc-VSS=3.5V VDD-0.5 0.0 6.0 1.0 13.0 0.2 VDD-0.5 0.5 tr5 VDD-Vc=3.5V, Vc-VSS=3.5V * 100 15 200 30 400 60 0.5 k k V V V V A A A 0.5 1.5 3.0 ms Vd1 Vh1 td1 tr1 Vd2 Vh2 td2 tr2 Vd3 Vh3 td3 tr3 Vd4 td4 Vd5 Vh5 Vstb td5 VDD-Vc=3.5V2.2V, Vc-VSS=3.5V VDD-Vc=2.2V3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V, Vc-VSS=3.5V Between VDD-Vc=3.5V, Vc-VSS=3.5V (V-)-VSS VDD-Vc=3.5V, Vc-VSS=3.5V Between VDD-Vc=2.0V, Vc-VSS=2.0V (V-)-VSS VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=3.5V4.5V, Vc-VSS=3.5V VDD-Vc=4.5V3.5V, Vc-VSS=3.5V 4.325 4.100 0.5 20.0 2.20 10.0 50 0.5 0.17 5.0 10.0 0.5 1.0 0.4 -0.60 25.0 VDDx0.4 0.5 4.350 4.150 1.0 40.0 2.30 20.0 100 1.0 0.20 10.0 20.0 1.0 1.3 1.0 -0.45 50.0 VDDx0.5 1.5 4.375 4.200 1.5 60.0 2.40 40.0 150 1.5 0.23 20.0 30.0 1.5 1.6 1.6 -0.30 100.0 VDDx0.6 3.0 V V s ms V mV ms ms V mV ms ms V ms V mV V ms Symbol Vcell Vmin Conditions Between VDD and VSS Between VDD-VSS =0 and VDD-VRatings min 1.5 typ max 10 1.5 Unit V V
* Upon connecting to charger upon over-discharge, the delay time after recovery from over-discharge.
No.A0694-2/8
LV5113T
Package Dimensions
unit : mm (typ) 3245B
200
Pd max -- Ta
Independent IC
3.0 8
Allowable power dissipation, Pd max -- mW
170 150
3.0
4.9
100
0.5
1 (0.53)
2 0.65 0.25 0.125
68 50
(0.85)
1.1MAX
0 -30 -20
0
20
40
60
80
100
Ambient temperature, Ta -- C
0.08
SANYO : MSOP8(150mil)
Pin Assignment
Dout 8 T 7 Vc Sense 6 5
2 VDD Cout
1
3 V-
4 VSS
Top view
Pin Functions
Pin No. 1 2 3 4 5 6 7 8 VDD Cout VVSS Sense Vc T Dout Symbol VDD pin Overcharge detection output pin Charger minus voltage input pin VSS pin Sense pin Intermediate voltage input pin Pin to shorten detection time (open under normal condition) Overdischarge detection output pin Description
No.A0694-3/8
LV5113T
Block Diagram
Sence 5 VDD 1 Level shift
+ + + td5,tr5
td1,tr1 Delay control logic td2,tr2
2 Cout
Vc 6
+ + + -
8 Dout
td3,tr3 + td4
4 VSS
3 V-
7 T
No.A0694-4/8
LV5113T
Functional Description
Over-charge detection If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by turning "L" the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time. This delay time is set by the internal counter. The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by connecting the load after detection of over-charge detection. Once over-charge detection is made, over-current detection is not made to prevent malfunction. Note that shortcircuit can be detected. Over-charge return If charger is connected and both cell voltages become equal to or lower than the over-charge recovery voltage or over-charge detection voltage when load is connected, the Cout pin returns to "H" after the over-charge recovery delay time set by the internal counter. When load is connected and either cell or both cell voltages are equal to or more than the over-charge detection voltage, the Cout pin does not return to "H." When the load current is passed through the external Cout pin parasite diode of Nch MOS FET after the over-charge recovery delay time and each cell voltage becomes equal to or below over-charge detection voltage, the Cout returns to "H." However, high voltage charger is connected as mentioned below, Cout pin does not return to "H" because overcharger detection sequence starts after over-charge recovery. Over-discharge detection When either cell voltage is equal to or below over-discharge voltage, stop further discharge by turning "L" the Dout pin and turning off external Nch MOS FET after the over-charge detection delay time. The IC becomes standby state after detecting over-discharge and its consumption current is kept at about 0A. After detection, the V- pin will be connected to VDD pin via 200k. Over-discharge return Return from over-discharge is made by connecting charger. If the V- pin voltage becomes equal to or lower than the standby return voltage by connecting charger after detecting over-discharge, it returns from the standby state to start cell voltage monitoring. If both voltages become equal to or more than the over-discharge detection voltage by charging, the Dout pin returns to "H" after the over-discharge return delay time set by the internal counter. Over-current detection When high current is passed through the battery, the V potential rises by the ON resister of external MOS FET and becomes equal to or more than the over-current detection voltage, that will be deemed over-current state. Turn "L" the Dout pin after the over-current detection delay time and turn off the external Nch MOS FET to prevent high current in the circuit. The delay time is set by the internal counter. After detection, the V- pin will be connected to VSS via 30k. It will not go into standby state after detecting over-current. Short circuit detection If greater discharge current is passed and the V- pin voltage becomes equal to or more than the short-circuit detection voltage, it will go into short-circuit detection state after the short circuit delay time shorter than the over-current detection delay time. When short-circuit is detected, just like the time of over-current detection, turn Dout pin "L" and turn off external Nch MOS FET to prevent high current in the circuit. The V- pin will be connected to VSS after detection via 30k. It will not go into standby state after detecting short-circuit. Over-current/short-detection return After detecting over-current or short circuit, the return resistor (typ.30k) between V- pin and VSS pin becomes effective and if the resistor is opened the V- pin voltage will be pulled by the VSS pin voltage. Thereafter, the IC will return from the over-current/short-circuit detection state when the V- pin voltage becomes equal to or below the overcurrent detection voltage and the Dout pin returns to "H" after over-current return delay time set by the internal counter.
No.A0694-5/8
LV5113T
Over-charger detection/return If the potential difference between V- pin and VSS pin becomes equal to or below the over-charger detection voltage by connecting a charger, no charging can be made by turning "L" the Cout pin after certain delay time and turning off the external Nch MOS FET. If this difference returns to equal to or more than the over-charger detection voltage during detection delay time, the over-charger detection will be stopped. If the potential difference between V- pin and VSS pin becomes equal to or more than the over-charger detection voltage after over-charger detection, the Cout returns to "H" after certain time. The detection/return delay time is set internally. If Dout pin is "L" charging will be made through the external Nch FET parasite diode of Dout pin. In that case, the potential difference between V- pin and VSS pin becomes -Vf which is equal to or less than the over-charger detection voltage, no over-charger detection will be made during over-discharge, over-current or short-circuit detection. Further, if over-discharged battery is connected to over-charger, no over-charger detection is made while the Dout pin is "L." If the battery voltage rises to the over-discharge detection voltage through the parasite diode and the Dout pin becomes "H", and the potential difference between V- pin and VSS pin is equal to or below the over-charger detection voltage, the delay operation will be started after Dout pin becoming "H." 0V cell charge If the cell voltage is 0V but a potential difference between VDD and V becomes equal to or greater than the 0V cell charging lowest operation voltage, the Cout pin will output "H" and enable charging. Test time reduction function By turning T pin to the VDD potential, the delay times set by the counter can be cut. Normal time settings if T pin is open. Delay time not set by the counter cannot be controlled by this pin.
Operation in case of detection overlap
Overlap state When, during overcharge detection, Over-discharge detection is made, Operation in case of detection overlap Over-charge detection is preferred. If overdischarge state continues even after overcharge detection, over-discharge detection is resumed. State after detection When over-charge detection is made first, V- is released. When over-discharge is detected after over-charge detection, the standby state is not effectuated. Note that V- is connected to VDD via 200k. Over-current detection is made, (*1) Both detections' can be made in parallel. Over-charge detection continues even when the over-current state occurs. If the over-charge state occurs first, over-current detection is interrupted. When, during overdischarge detection, Over-charge detection is made, Over-discharge detection is interrupted and over-charge detection is preferred. When overdischarge state continues even after overcharge detection, over-discharge detection is resumed. Over-current detection is made, (*3) Both detections can be made in parallel. Over-discharge detection continues even when the over-current state is effectuated first. Overcurrent detection is interrupted when the overdischarge state is effectuated first, (*4) If over-current is detected in advance, V will be connected to VSS via 30k. After detecting over-discharge, V will be connected to VDD via 200k to get into standby state. If overdischarge is detected in advance, V will be connected to VDD via 200k to get into standby When, during overcurrent detection, Over-charge detection is made, Over-discharge detection is made, (*1) (*3) state. (*2) (*4) The standby state is not effectuated when overdischarge detection is made after over-charge detection. Note that V- is connected to VDD via 200k. (*2) When over-current is detected first, V- is connected to VSS via 30k. When over-charge detection is made first, V- is released.
(Note) Short-circuit detection can be made independently. Over-charger detection does not work during over-discharge, over-current or short-circuit detection and the delay time starts after return from these states.
No.A0694-6/8
LV5113T
Timing Chart
[Cout Output System]
Charger connection Hysteresis cancellation by load connection
Load connection
Charger connection
Load connection
Charger connection
Over-charger connection
Load connection
Vd1 Vr1 Charging recovery depends on charger voltage when connecting charger.
VDD Vd2
VDD Vd4 VVd3 VSS Vd5
Discharging via FETparasite Di
Discharging via FETparasite Di
VDD td1 VOver-charge detection state Over-charge detection state Over-charger detection state tr1 td1 tr1 td5 tr5
Cout
[Dout Output System]
Load connection Charger connection Load connection Over-current occurrence Vd1 Vr1 Load connection Load short-circuit occurrence Load connection Over-charger connection
VDD Vd2
To standby VDD Vd4 VVd3 VSS Vd5
To standby
Charging via FETparasite Di
VDD Dout VSS Over-discharge detection state Over-current detection state Short-circuit detection state td2 tr2 td3 tr3 td4 tr3 td2 tr2
VDD Cout VOver-charger detection upon charging over-discharged battery is activated after return from over-charge. td5
No.A0694-7/8
LV5113T
Application Circuit Example
+
R1 C1 R2 C2 VSS VDD Vc R4 Sense C3 VSS
LV5113T
VDout Cout R3
-
Components R1, R2 R3 R4 C1, C2, C3
Recommended value 100 2k 100 0.1
max 1k 4k 10k 1
unit F
* These numbers don't mean to guarantee the characteristic of the IC. * In addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between VDD and VSS of the IC as near as possible to stabilize the power supply voltage to the IC.
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This catalog provides information as of May, 2007. Specifications and information herein are subject to change without notice. PS No.A0694-8/8


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